1—10章节,我称之为stm32移植ecos系列的第一篇章:让Redboot和eCos跑起来。从中可以看到,借助eCos本身带的ST STM3210E EVAL board模板和examples,几乎不需要做什么修改就让eCos在STM32板子上跑起来了。这一方面得意于我的板子与该模板对应的ST官方板子在存储器设计上大同小异,另一方面则是得意于eCos良好的架构设计,使系统移植变得轻而易举。

在展开ecos裁减、配置和驱动编写移植之前,我来说下如何创建和使用自己的模板(Template)。这里可能会有人问了:官方都提供了模板,还需要创建自己板子的模板吗?这不是多此一举吗?

是的,表面上看有点多余,但实际上更符合系统移植方法与步骤。

  • ecos自带的模板一般是基于芯片厂家的评估板而创建的。而我们使用的目标板或多或少与这些板有差异,甚至有比较大的差异,有时,目标板的CPU在ecos中没有相应的模板,这时候只能借鉴相近的模板展开移植,以降低难度和减少工作量;这就使我们有必要根据目标板创建自己的模板;
  • 使用自己的模板可尽量少的去修改ecos本身的代码,这样便于与ecos cvs服务器代码保持同步,而不至于引起代码冲突;
  • 创建自己的模板,更深入了解ecos的模板、package、component、cdl脚本、HAL的概念;

由于ecos优秀的架构设计,所以创建自己的模板也变得很容易。

1. 拷贝模板

在移植系统时,一般都会借鉴使用系统中板子硬件配置尽量相近的模板,linux如此,ecos亦如此。对于使用stm32f10xxx系列CPU的板子,ecos自带有ST STM3210E EVAL board这个模板。因此,移植ecos到stm32开发板时,我们可借鉴使用这个模板。

ecos源码packages\hal\cortexm\stm32\stm3210e_eval对应STM3210E EVAL board,复制stm3210e_eval文件夹,重新命名为:stm32f10xxx(名称自己取)。

2. 修改stm32f10xxx模板中文件名、内容等

拷贝并重命名后,修改其中的CDL及源码、LDI等文件,包括文件名及内容,我修改的时候,凡是遇到与stm3210e_eva相关的单词都替换成了stm32f10xxx。我把几个要修改的地方说明如下。

2.1 修改cdl文件名称及其内容

把cdl文件名称从hal_cortexm_stm32_stm3210e_eval.cdl改为hal_cortexm_stm32_stm32f10xxx.cdl。

修改CDL文件内容。修改之前,最好了解下CDL脚本的语法,不过,也容易,一看便知其意。在这个文件中,凡是STM3210E EVAL都替换成STM32F10XXX,凡是stm3210e_eval都替换成stm32f10xxx,凡是stm3210e eval都替换成stm32f10xxx platform,同时,去掉了CYGHWR_HAL_CORTEXM_STM32_SPIETH_CONTROLLER这个组件,修改了debug串口默认波特率为115200。修改后的CDL文件见下面。

2.2 修改stm32f10xxx\current\include\pkgconf目录下的文件名

把该目录下所有文件名称中的stm3210e_eval都替换成stm32f10xxx。

2.3 修改stm32f10xxx\current\include下plf_arch.h、plf_intr.h、plf_io.h文件中的头文件

这3个文件中,都包含了hal_cortexm_stm32_stm3210e_eval.h这个头文件,这个头文件的名称是在2.1中的CDL中定义的。

2.4 修改stm32f10xxx\current\src目录下的文件名

同样,把该目录下所有文件名称中的stm3210e_eval都替换成stm32f10xxx。同时,该目录下的源文件同样包含了hal_cortexm_stm32_stm3210e_eval.h这个头文件,这个头文件的名称是在2.1中的CDL中定义的。

3. 修改ecos.db,在文件的最后添加:

01# added start by gyr 2013.02.22
02package CYGPKG_HAL_CORTEXM_STM32_STM32F10XXX {
03    alias       { "ST STM32F10XXX HAL" hal_cortexm_stm32f10xxx }
04    directory   hal/cortexm/stm32/stm32f10xxx
05    script      hal_cortexm_stm32_stm32f10xxx.cdl
06    hardware
07        description "
08        The stm32f10xxx HAL package provides the support needed to run
09        eCos on the ST stm32f10xxx platform board."
10}
11 
12target stm32f10xxx {
13        alias { "ST STM32F10XXX platform board" stm32f10xxx }
14        packages { CYGPKG_HAL_CORTEXM
15                   CYGPKG_HAL_CORTEXM_STM32
16                   CYGPKG_HAL_CORTEXM_STM32_STM32F10XXX                  
17                   CYGPKG_DEVS_FLASH_AMD_AM29XXXXX_V2
18                   CYGPKG_DEVS_FLASH_STM32
19                   CYGPKG_DEVS_FLASH_SPI_M25PXX
20                   CYGPKG_IO_SERIAL_CORTEXM_STM32
21                   CYGPKG_DEVS_WALLCLOCK_STM32
22                   CYGPKG_IO_SPI
23                   CYGPKG_DEVS_SPI_CORTEXM_STM32
24                   CYGPKG_DEVS_ADC_CORTEXM_STM32
25                   CYGPKG_IO_USB
26                   CYGPKG_IO_USB_SLAVE
27                   CYGPKG_DEVS_USB_CORTEXM_STM32
28                   CYGPKG_IO_FLASH           
29                 }
30        description "The stm32f10xxx target provides the packages needed
31        to run eCos on the STM32F10XXX platform board."
32}
33# added end by gyr 2013.02.22

上述添加的东西是拷贝STM3210E EVAL board模板的(可用STM3210E作为关键字在ecos.db中搜索到这个target),并在此基础上修改了相应名称和描述,以及多加了flash包:CYGPKG_IO_FLASH。

到此,完成了模板的创建。重新打开ecos图形配置工具,则看到我们创建的模板“ST STM32F10XXX platform board”了。重新生成redboot.ecc和ecos.ecc(注意生成redboot时,不能使用misc目录下的redboot_ROM.ecm配置文件了,否则图形配置工具会闪退,原因不知)。

对这个模板进行了验证,生成的redboot(ROM启动),helloworld程序(ROM启动)都可正常启动,但helloworld程序配成RAM启动后,不能用redboot引导内存中的helloworld程序。

附上我修改的CDL文件内容:

001##==========================================================================
002##
003##      hal_cortexm_stm32_stm32f10xxx.cdl
004##
005##      Cortex-M STM32F10XXX platform HAL configuration data
006##
007##==========================================================================
008## ####ECOSGPLCOPYRIGHTBEGIN####                                           
009## -------------------------------------------                             
010## This file is part of eCos, the Embedded Configurable Operating System.  
011## Copyright (C) 2008, 2012 Free Software Foundation, Inc.
012##
013## eCos is free software; you can redistribute it and/or modify it under   
014## the terms of the GNU General Public License as published by the Free    
015## Software Foundation; either version 2 or (at your option) any later     
016## version.                                                                
017##
018## eCos is distributed in the hope that it will be useful, but WITHOUT     
019## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or   
020## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License   
021## for more details.                                                       
022##
023## You should have received a copy of the GNU General Public License       
024## along with eCos; if not, write to the Free Software Foundation, Inc.,   
025## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.           
026##
027## As a special exception, if other files instantiate templates or use     
028## macros or inline functions from this file, or you compile this file     
029## and link it with other works to produce a work based on this file,      
030## this file does not by itself cause the resulting work to be covered by  
031## the GNU General Public License. However the source code for this file   
032## must still be made available in accordance with section (3) of the GNU  
033## General Public License v2.                                              
034##
035## This exception does not invalidate any other reasons why a work based   
036## on this file might be covered by the GNU General Public License.        
037## -------------------------------------------                             
038## ####ECOSGPLCOPYRIGHTEND####                                             
039##==========================================================================
040#######DESCRIPTIONBEGIN####
041##
042## Author(s):    reille
043## Date:         2013-02-22
044##
045######DESCRIPTIONEND####
046##
047##==========================================================================
048 
049cdl_package CYGPKG_HAL_CORTEXM_STM32_STM32F10XXX {
050    display       "ST STM32F10XXX Development Board HAL"
051    parent        CYGPKG_HAL_CORTEXM_STM32
052    requires      { CYGHWR_HAL_CORTEXM_STM32_FAMILY == "F1" }
053    requires      { CYGHWR_HAL_CORTEXM_STM32_F1 == "F103ZE" }
054    define_header hal_cortexm_stm32_stm32f10xxx.h
055    include_dir   cyg/hal
056    hardware
057    description   "
058        The STM32F10XXX HAL package provides the support needed to run
059        eCos on the ST stm32f10xxx platform board."
060 
061    compile       stm32f10xxx_misc.c
062 
063    define_proc {
064        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   <pkgconf/hal_cortexm.h>"
065        puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H  <pkgconf/hal_cortexm_stm32.h>"
066        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_cortexm_stm32_stm32f10xxx.h>"
067    puts $::cdl_header "#define HAL_PLATFORM_CPU    \"Cortex-M3\""
068        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"ST STM32F10XXX\""
069        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
070    }
071 
072    cdl_component CYG_HAL_STARTUP {
073        display       "Startup type"
074        flavor        data
075        default_value {"RAM"}
076        legal_values  {"RAM" "SRAM" "ROM" "JTAG"}
077    no_define
078    define -file system.h CYG_HAL_STARTUP
079        description   "
080            When targetting the ST STM32F10XXX platform board it is possible to
081            build the system for either RAM bootstrap or ROM bootstrap.
082            Select 'RAM' when building programs to load into RAM using onboard
083            debug software such as RedBoot or eCos GDB stubs.  Select 'ROM'
084            when building a stand-alone application which will be put
085            into ROM. The 'JTAG' type allows programs to be downloaded using a
086            JTAG debugger such as a BDI3000 or PEEDI. The 'SRAM' type allows
087            programs to be downloaded via a JTAG debugger into on-chip SRAM."
088    }
089 
090    cdl_component CYGHWR_MEMORY_LAYOUT {
091        display "Memory layout"
092        flavor data
093        no_define
094        calculated    { (CYG_HAL_STARTUP == "RAM" ) ?
095                        (CYGMEM_HAL_CORTEXM_STM32_STM32F10XXX_EXTRA_BASE_RAM ?
096                        "cortexm_stm32f10xxx_extrabaseram" : "cortexm_stm32f10xxx_ram")      :
097                        (CYG_HAL_STARTUP == "SRAM") ? "cortexm_stm32f10xxx_sram"     :
098                        (CYG_HAL_STARTUP == "ROM" ) ? "cortexm_stm32f10xxx_rom"      :
099                        (CYG_HAL_STARTUP == "JTAG") ? "cortexm_stm32f10xxx_jtag"     :
100                                                      "undefined" }
101 
102        cdl_option CYGMEM_HAL_CORTEXM_STM32_STM32F10XXX_EXTRA_BASE_RAM {
103            display       "Additional reserved space at base of RAM"
104            flavor        booldata
105            default_value 0
106            active_if     {CYG_HAL_STARTUP == "RAM"}
107            legal_values  0 to 0x80000
108            description   "
109                If you are using a RedBoot with additional components enabled,
110                such as networking, RedBoot may be occupying additional RAM.
111                In such cases, an eCos application loaded by RedBoot must
112                reserve additional space at the base of RAM to accommodate
113                RedBoot's extra RAM requirements. This option, specified in
114                bytes, allows the amount of extra reserved space to be
115                increased beyond the default."
116        }
117 
118        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
119                display "Memory layout linker script fragment"
120                flavor data
121                no_define
122                define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
123                calculated { "<pkgconf/mlt_" . CYGHWR_MEMORY_LAYOUT . ".ldi>" }
124        }
125 
126        cdl_option CYGHWR_MEMORY_LAYOUT_H {
127                display "Memory layout header file"
128                flavor data
129                no_define
130                define -file system.h CYGHWR_MEMORY_LAYOUT_H
131                calculated { "<pkgconf/mlt_" . CYGHWR_MEMORY_LAYOUT . ".h>" }
132        }
133 
134    }
135 
136    cdl_option CYGARC_HAL_CORTEXM_STM32_INPUT_CLOCK {
137        display         "Input Clock frequency"
138        flavor          data
139        default_value   8000000
140        legal_values    0 to 1000000000
141        description     "Main clock input."
142    }
143 
144    cdl_component CYGHWR_HAL_CORTEXM_STM32_FLASH {
145        display         "Flash support"
146        parent          CYGPKG_IO_FLASH
147        active_if       CYGPKG_IO_FLASH
148        compile         -library=libextras.a stm32f10xxx_flash.c
149        default_value   1
150        description     "Control flash device support for stm32f10xxx platform board."
151 
152        cdl_option CYGHWR_HAL_CORTEXM_STM32_FLASH_INTERNAL {
153            display         "Internal flash support"
154            default_value   1
155            description     "This option enables support for the internal flash device."
156        }
157 
158        cdl_option CYGHWR_HAL_CORTEXM_STM32_FLASH_NOR {
159            display         "External NOR flash support"
160            default_value   1
161            description     "This option enables support for the external NOR flash device."
162        }
163 
164    }
165 
166    # Both UARTs 0 and 1 are available for diagnostic/debug use.
167    implements CYGINT_HAL_STM32_UART0
168    implements CYGINT_HAL_STM32_UART1
169 
170    implements      CYGINT_IO_SERIAL_FLOW_CONTROL_HW
171    implements      CYGINT_IO_SERIAL_LINE_STATUS_HW
172 
173    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
174        display      "Number of communication channels on the board"
175        flavor       data
176        calculated   2
177    }
178 
179    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
180        display          "Debug serial port"
181        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE
182        flavor data
183        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
184        default_value    0
185        description      "
186            The ST STM32F10XXX platform board has two serial ports. This option
187            chooses which port will be used to connect to a host
188            running GDB."
189     }
190 
191     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
192         display          "Diagnostic serial port"
193         active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE
194         flavor data
195         legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
196         default_value    0
197         description      "
198            The ST STM32F10XXX has two serial ports. This option
199            chooses which port will be used for diagnostic output."
200     }
201 
202    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {
203        display       "Console serial port baud rate"
204        flavor        data
205        legal_values  9600 19200 38400 57600 115200
206        default_value 115200
207        description   "
208            This option controls the default baud rate used for the
209            console connection.
210            RedBoot usess polling to transfer data over this port and
211            might not be able to keep up with baud rates above the
212            default, particularly when doing XYZmodem downloads. The
213            interrupt-driven device driver is able to handle these
214            baud rates, so any high speed application transfers should
215            use that instead.
216            Note: this should match the value chosen for the GDB port if the
217            diagnostic and GDB port are the same."
218    }
219 
220    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {
221        display       "GDB serial port baud rate"
222        flavor        data
223        legal_values  9600 19200 38400 57600 115200
224        default_value 115200
225        description   "
226            This option controls the default baud rate used for the
227            GDB connection.
228            RedBoot usess polling to transfer data over this port and
229            might not be able to keep up with baud rates above the
230            default, particularly when doing XYZmodem downloads. The
231            interrupt-driven device driver is able to handle these
232            baud rates, so any high speed application transfers should
233            use that instead.
234            Note: this should match the value chosen for the console port if the
235            console and GDB port are the same."
236    }
237 
238    cdl_component CYGBLD_GLOBAL_OPTIONS {
239        display "Global build options"
240        flavor  none
241        parent  CYGPKG_NONE
242        description   "
243        Global build options including control over
244        compiler flags, linker flags and choice of toolchain."
245 
246        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
247            display "Global command prefix"
248            flavor  data
249            no_define
250            default_value { "arm-eabi" }
251            description "
252                This option specifies the command prefix used when
253                invoking the build tools."
254        }
255 
256        cdl_option CYGBLD_GLOBAL_CFLAGS {
257            display "Global compiler flags"
258            flavor  data
259            no_define
260            default_value { CYGBLD_GLOBAL_WARNFLAGS . "-mcpu=cortex-m3 -mthumb -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions" }
261            description   "
262                This option controls the global compiler flags which are used to
263                compile all packages by default. Individual packages may define
264                options which override these global flags."
265        }
266 
267        cdl_option CYGBLD_GLOBAL_LDFLAGS {
268            display "Global linker flags"
269            flavor  data
270            no_define
271            default_value { "-mcpu=cortex-m3 -mthumb -Wl,--gc-sections -Wl,-static -Wl,-n -g -nostdlib" }
272            description   "
273                This option controls the global linker flags. Individual
274                packages may define options which override these global flags."
275        }
276    }
277 
278    cdl_component CYGPKG_HAL_CORTEXM_STM32_STM32F10XXX_OPTIONS {
279        display "stm32f10xxx HAL build options"
280                flavor  none
281                description   "
282                        Package specific build options including control over
283                        compiler flags used only in building this HAL."
284 
285                cdl_option CYGPKG_HAL_CORTEXM_STM32_STM32F10XXX_CFLAGS_ADD {
286                        display "Additional compiler flags"
287                        flavor  data
288                        no_define
289                        default_value { "-Werror" }
290                        description   "
291                                This option modifies the set of compiler flags
292                                for building this HAL. These flags are used
293                                in addition to the set of global flags."
294                        }
295                cdl_option CYGPKG_HAL_CORTEXM_STM32_STM32F10XXX_CFLAGS_REMOVE {
296                        display "Suppressed compiler flags"
297                        flavor  data
298                        no_define
299                        default_value { "" }
300                        description   "
301                                This option modifies the set of compiler flags
302                                for building this HAL. These flags are
303                                removed from the set of global flags if
304                                present."
305                }
306        }
307 
308    cdl_option CYGSEM_HAL_ROM_MONITOR {
309        display       "Behave as a ROM monitor"
310        flavor        bool
311        default_value 0
312        parent        CYGPKG_HAL_ROM_MONITOR
313        requires      { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "JTAG" }
314        requires      { CYGDBG_HAL_CRCTABLE_LOCATION == "ROM" }
315        description   "
316            Enable this option if this program is to be used as a ROM monitor,
317            i.e. applications will be loaded into RAM on the board, and this
318            ROM monitor may process exceptions or interrupts generated from the
319            application. This enables features such as utilizing a separate
320            interrupt stack when exceptions are generated."
321    }
322 
323    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
324         display       "Work with a ROM monitor"
325         flavor        booldata
326         legal_values  { "Generic" "GDB_stubs" }
327         default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
328         parent        CYGPKG_HAL_ROM_MONITOR
329         requires      { CYG_HAL_STARTUP == "RAM" }
330         description   "
331             Support can be enabled for different varieties of ROM monitor.
332             This support changes various eCos semantics such as the encoding
333             of diagnostic output, or the overriding of hardware interrupt
334             vectors.
335             Firstly there is \"Generic\" support which prevents the HAL
336             from overriding the hardware vectors that it does not use, to
337             instead allow an installed ROM monitor to handle them. This is
338             the most basic support which is likely to be common to most
339             implementations of ROM monitor.
340             \"GDB_stubs\" provides support when GDB stubs are included in
341             the ROM monitor or boot ROM."
342     }
343 
344    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
345        display       "Redboot HAL options"
346        flavor        none
347        no_define
348        parent        CYGPKG_REDBOOT
349        active_if     CYGPKG_REDBOOT
350        description   "
351            This option lists the target's requirements for a valid Redboot
352            configuration."
353 
354        requires { CYGNUM_REDBOOT_FLASH_BASE == 0x64000000 }
355        requires { CYGBLD_REDBOOT_MAX_MEM_SEGMENTS == 2 }
356 
357        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
358            display       "Build Redboot ROM binary images"
359            active_if     CYGBLD_BUILD_REDBOOT
360            default_value 1
361            no_define
362            description "This option enables the conversion of the Redboot ELF
363                         image to binary image formats suitable for ROM programming."
364 
365            make -priority 325 {
366                <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf
367                $(OBJCOPY) --strip-debug $< $(@:.bin=.img)
368                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
369                $(OBJCOPY) -O binary $< $@
370            }
371        }
372    }
373 
374    cdl_component CYGBLD_HAL_CORTEXM_STM32F10XXX_GDB_STUBS {
375        display "Create StubROM SREC and binary files"
376        active_if CYGBLD_BUILD_COMMON_GDB_STUBS
377        no_define
378        calculated 1
379        requires { CYG_HAL_STARTUP == "ROM" }
380 
381        make -priority 325 {
382                <PREFIX>/bin/stubrom.srec : <PREFIX>/bin/gdb_module.img
383                $(OBJCOPY) -O srec $< $@
384        }
385        make -priority 325 {
386                <PREFIX>/bin/stubrom.bin : <PREFIX>/bin/gdb_module.img
387                $(OBJCOPY) -O binary $< $@
388        }
389 
390        description "This component causes the ELF image generated by the
391                     build process to be converted to S-Record and binary
392                     files."
393    }
394}
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  4 Responses to “stm32移植ecos #11,使用自己的模板(Template)”

  1. 请问那些中断怎样配置?谢谢

  2. 期待你弄个不用外部存储器的STM32配置。我已经在linux系统上搭好环境了,不过只能选一种stm32配置,而且必须有外部nor sram的。

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